october 2011 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 www.fairchildsemi.com 1 FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet FDMB2307NZ dual common drain n-channel powertrench ? mosfet 20 v, 9.7 a, 16.5 m features ? max r s1s2(on) = 16.5 m at v gs = 4.5 v, i d = 8 a ? max r s1s2(on) = 18 m at v gs = 4.2 v, i d = 7.4 a ? max r s1s2(on) = 21 m at v gs = 3.1 v, i d = 7 a ? max r s1s2(on) = 24 m at v gs = 2.5 v, i d = 6.7 a ? low profile - 0.8 mm maximum - in the new package micro fet 2x3 mm ? hbm esd protection level > 2 kv (note 3) ? rohs compliant general description this device is designe d specifically as a single package solution for li-ion battery pack protection circuit and other ultra-portable applications. it features tw o common drain n-channel mosfets, which enables bidi rectional current flow, on fairchild?s advanced powertrench ? process with state of the art microfet leadframe, the FDMB2307NZ minimizes both pcb space and r s1s2(on) . application ? li-ion battery pack mlp 2x3 s1 s2 g1 g2 s2 s1 6 5 4 3 2 1 g1 s1s1 g2 s2s2 d1/d2 pin 1 pin 1 bottom top mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v s1s2 source1 to source2 voltage 20 v v gs gate to source voltage (note 4) 12 v i s1s2 source1 to source2 current -continuous t a = 25c (note 1a) 9.7 a -pulsed 40 p d power dissipation t a = 25 c (note 1a) 2.2 w power dissipation t a = 25 c (note 1b) 0.8 t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient(dual operation) (note 1a) 57 c/w r ja thermal resistance, junction to ambient(dual operation) (note 1b) 161 device marking device package reel size tape width quantity 307 FDMB2307NZ mlp 2x3 7?? 8 mm 3000 units
FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet www.fairchildsemi.com 2 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 electrical characteristics t j = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics source1- source2 diode characteristics symbol parameter test conditions min typ max units i s1s2 zero gate voltage source1 to source2 current v s1s2 = 16 v, v gs = 0 v 1 p a i gss gate to source leakage current v gs = 12 v, v s1s2 = 0 v 10 p a v gs(th) gate to source threshold voltage v gs = v s1s2 , i s1s2 = 250 p a0.611.5v r s1s2(on) static source1 to source2 on resistance v gs = 4.5 v, i s1s2 = 8 a 10.5 13.5 16.5 m : v gs = 4.2 v, i s1s2 = 7.4 a 11 14 18 v gs = 3.1 v, i s1s2 = 7 a 11.5 16 21 v gs = 2.5 v, i s1s2 = 6.7 a 12 18 24 v gs = 4.5 v, i s1s2 = 8 a, t j = 125 c 11 20 29 g fs forward transconductance v s1s2 = 5 v, i s1s2 = 8 a 41 s c iss input capacitance v s1s2 = 10 v, v gs = 0 v, f = 1 mhz 1760 2640 pf c oss output capacitance 229 345 pf c rss reverse transfer capacitance 211 320 pf t d(on) turn-on delay time v s1s2 = 10 v, i s1s2 = 8 a, v gs = 4.5 v, r gen = 6 : 12 22 ns t r rise time 19 34 ns t d(off) turn-off delay time 32 51 ns t f fall time 9.5 17 ns q g total gate charge v gs = 0 v to 5 v v s1s2 = 10 v, i s1s2 = 8 a 20 28 nc q g total gate charge v gs = 0 v to 4.5 v 18 25 nc q gs gate to source charge 2.8 nc q gd gate to drain ?miller? charge 5.3 nc i fss maximum continuous source1-source2 diode forward current 8 a v fss source1 to source2 diode forward voltage v g1s 1 = 0 v, v g2s2 = 4.5 v, i fss = 8 a (note 2) 0.8 1.2 v notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 300 p s, duty cycle < 2.0%. 3. the diode connected between the gate and source serves only as protection against esd. no gate overvoltage rating is implied . 4. as an n-ch device, the negative vgs rating is for low duty cycle pulse ocurrence only. no continuous rating is implied. a. 57 c/w when mounted on a 1 in 2
FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet www.fairchildsemi.com 3 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 typical characteristics t j = 25c unless otherwise noted figure 1. 0.0 0.2 0.4 0.6 0.8 0 10 20 30 40 v g1s1 = 2.5 v v g1s1 = 4.2 v v g1s1 = 3.1 v pulse duration = 80 s duty cycle = 0.5% max v g2s2 = 4.5 v v g1s1 = 4.5 v i s1s2 , source1 to source2 current (a) v s1s2 , source1 to source2 voltage (v) on-region characteristics figure 2. 0.0 0.2 0.4 0.6 0.8 0 10 20 30 40 v gs = 3.1 v v gs = 2.5 v pulse duration = 80 s duty cycle = 0.5% max v gs = 4.2 v v gs = 4.5 v i s1s2 , source1 to source2 current (a) v s1s2 , source1 to source2 voltage (v) o n - r e g i o n c h a r a c t e r i s t i c s f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e v s drain current and gate voltage 0 10203040 0.5 1.0 1.5 v g1s1 = 4.2 v pulse duration = 80 s duty cycle = 0.5% max v g2s2 = 4.5 v normalized source1 to source2 on-resistance i s1s2 , source1 to source2 current (a) v g1s1 = 2.5 v v g1s1 = 4.5 v v g1s1 = 3.1 v figure 4. 0 10203040 0.5 1.0 1.5 pulse duration = 80 s duty cycle = 0.5% max normalized source1 to source2 on-resistance i s1s2 , source1 to source2 current (a) v gs = 2.5 v v gs = 4.5 v v gs = 3.1 v v gs = 4.2 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 5 . n o r m a l i z e d o n r e s i s t a n c e -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i s1s2 = 8 a v gs = 4.5 v normalized source1 to source2 on-resistance t j , junction temperature ( o c ) vs junction temperature figure 6. 1.01.52.02.53.03.54.04.5 0 20 40 60 80 t j = 150 o c i s1s2 = 8 a t j = 25 o c v gs , gate to source voltage (v) r s1s2(on) , source1 to source2 on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n r e s i s t a n c e v s g a t e t o source voltage
FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet www.fairchildsemi.com 4 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 figure 7. 0 . 51 . 01 . 52 . 0 0 10 20 30 40 t j = 150 o c v s1s2 = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i s1s2 , source1 to source2 current (a) v gs , gate to source voltage (v) transfer characteristics figure 8. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = 25 o c t j = -55 o c t j = 150 o c v g1s1 = 0 v, v g2s2 = 4.5 v i fss , source1 to source2 forward current (a) v fss , body diode forward voltage (v) s o u r c e 1 t o s o u r c e 2 d i o d e forward voltage vs source current figure 9. gate charge characteristics f i g u r e 1 0 . c a p a c i t a n c e v s s o u r c e 1 t o source2 voltage figure 11. 0481 21 6 10 -10 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 v s1s2 = 0 v t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) i g , gate leakage current (a) gate leakage current vs gate to source voltage figure 12. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 10 ms 10 s 100 ms dc 1 s 1 ms i s1s2 , source1 to source2 current (a) v s1s2 , source1 to source2 voltage (v) this area is limited by r ds(on) single pulse t j = max rated r ja = 161 o c/w t a = 25 o c f o r w a r d b i a s s a f e operating area typical characteristics t j = 25c unless otherwise noted 0 5 10 15 20 25 0 1 2 3 4 5 v g2s2 = 0 v i s1s2 = 8 a v s1s2 = 12 v v s1s2 = 8 v v g1s1 , gate1 to source1 voltage (v) q g , gate charge (nc) v s1s2 = 10 v 0.1 1 10 20 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v s1s2 , source1 to source2 voltage (v) c rss c oss c iss
FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet www.fairchildsemi.com 5 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 figure 13. single pulse m aximum power dissipation 10 -3 10 -2 10 -1 11 0 100 1000 0.5 1 10 100 1000 p (pk) , peak transient power (w) single pulse r ja = 161 o c/w t a = 25 o c t, pulse width (sec) figure 14. junction-to-ambient transient thermal response curve typical characteristics t j = 25c unless otherwise noted 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r ja = 161 o c/w duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a
FDMB2307NZ dual common dr ain n-channel powertrench ? mosfet www.fairchildsemi.com 6 ?2011 fairchild semiconductor corporation FDMB2307NZ rev.c5 dimensional outline and pad layout
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